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From guozh...@apache.org
Subject kafka-site git commit: bold font for section name
Date Sat, 01 Jul 2017 01:19:35 GMT
Repository: kafka-site
Updated Branches:
  refs/heads/asf-site 34f8ecea0 -> 9e96b0cad


bold font for section name


Project: http://git-wip-us.apache.org/repos/asf/kafka-site/repo
Commit: http://git-wip-us.apache.org/repos/asf/kafka-site/commit/9e96b0ca
Tree: http://git-wip-us.apache.org/repos/asf/kafka-site/tree/9e96b0ca
Diff: http://git-wip-us.apache.org/repos/asf/kafka-site/diff/9e96b0ca

Branch: refs/heads/asf-site
Commit: 9e96b0cad5269bc66cb2a46bad7d2755b104886b
Parents: 34f8ece
Author: Guozhang Wang <wangguoz@gmail.com>
Authored: Fri Jun 30 18:19:29 2017 -0700
Committer: Guozhang Wang <wangguoz@gmail.com>
Committed: Fri Jun 30 18:19:29 2017 -0700

----------------------------------------------------------------------
 0110/streams/developer-guide.html | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
----------------------------------------------------------------------


http://git-wip-us.apache.org/repos/asf/kafka-site/blob/9e96b0ca/0110/streams/developer-guide.html
----------------------------------------------------------------------
diff --git a/0110/streams/developer-guide.html b/0110/streams/developer-guide.html
index f2d0cf4..95961f1 100644
--- a/0110/streams/developer-guide.html
+++ b/0110/streams/developer-guide.html
@@ -35,7 +35,7 @@
     <h4><a id="streams_processor_process" href="#streams_processor_process">Processor</a></h4>
 
     <p>
-    As mentioned in the <a href="/{{version}}/documentation/streams/core-concepts">Core
Concepts</a> section, a stream processor is a node in the processor topology that represents
a single processing step.
+    As mentioned in the <a href="/{{version}}/documentation/streams/core-concepts"><b>Core
Concepts</b></a> section, a stream processor is a node in the processor topology
that represents a single processing step.
     With the <code>Processor</code> API developers can define arbitrary stream
processors that process one received record at a time, and connect these processors with
     their associated state stores to compose the processor topology that represents their
customized processing logic.
     </p>


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